3GPP compliant decoding chain

Turbo Code Demo for 4G URLLC

Rob Maunder, CTO - Turbo code demo for 4G URLLC

Our Turbo decoding IP core for the 3GPP LTE uplink and downlink uses a novel architecture, which facilitates much higher degrees of parallel processing than competitor solutions, without compromising hardware efficiency or error correction capability. This enables 10x improvements to latency, which satisfies the 7x reduction in processing time that is available in LTE URLLC compared to conventional LTE. Our IP has several parameters, which can be adjusted at synthesis-time to scale the parallelism, latency and throughput.

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Features

  • Fully compliant with the 3GPP LTE standard for PDSCH and PUSCH. Supports the full range of uncoded and encoded block sizes
  • Supports processing times required for LTE URLLC
  • Implements the entire Turbo code block decoding chain in 3GPP TS36.212 including HARQ
  • High error correction performance from innovative patented Turbo decoder core
  • Tightly integrates the components in the chain to reduce area usage and latency
  • Simple AXI interface for easy integration
  • 10x reduction in latency compared to conventional implementations
  • Support for early termination and soft in soft out operation
  • FPGA support for Xilinx, Intel and Achronix
  • Optimized for ASIC process
  • Matlab and C Models available
  • Configurable parameters for power and performance optimization
  • Scalable design

 

Deliverables

Type Technology
Design files Encrypted RTL source or encrypted netlist
Language SystemVerilog and UVM
Documentation Databriefs, Datasheet, Integration guide, example testbench with tcl scripts
Models provided Bit-accurate static or dynamic library for Windows and Linux; Clock cycle models for latency and throughput analysis

Technical resources

Our technical resources are freely available for anyone to download. Research and innovation form an integral part of our business and we want to share this with you.

download-datasheet

Datasheets

Detailed specification sheets for our Turbo product, including bloc diagrams, performance graphs and comparison tables.

View Datasheets
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Whitepapers

Research, technical leadership and tutorial papers from our CTO on the latest factors influencing the future Turbo standards.

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Software

Open source software models and evaluation code for encoder and decoder simulations across our LDPC, Polar and Turbo products.

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We are transforming the next generations of wireless communications with innovative, world-leading IP that delivers ultra-high performance and error resilient signal processing. Let’s connect to discuss how our channel coding solutions can help your business thrive today and into the future.

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