As we move to higher performance communications systems, more complex algorithms are required in channel coding architecture to keep innovating. We deliver standards compliant solutions such as Turbo, a highly parallel architecture used in 4G LTE. For 5G NR we provide LDPC complete chain for the data channels and Polar complete chain solutions for the control channels all to the required 3GPP compliant specification.
PxSCH
Integrating and validating the various functional blocks of the 3GPP Physical Layer consumes significant engineering resource and by providing a complete pre integrated IP solution, AccelerComm simplifies the design of a high performance gNB. For instance, a key bottleneck in the Uplink receive chain is often the very high data rate required to pass data to the LDPC decoder as LLRs. By integrating the Demodulator and LDPC Decoder and passing the data as IQ values, the AccelerComm IP offers an opportunity to reduce this bottleneck by a factor of two.
- Implemented for 3GPP NR specifications and compliant with TS 38.211 and 38.212
- New QAM modulator/demodulator functionality complements existing LDPC and Polar coding solutions
- Inherits all the benefits from the existing AccelerComm LDPC, Polar encoders/decoders
- Support for Uplink Control information (UCI) multiplexed onto the PUSCH
- Improved BLER for UCI control data
- Configurable to different parallelisms specific to each integration
LDPC
By focussing on 5G NR, we have created an innovative LDPC solution that provides the best of block-parallel and row-parallel architectures, resulting in maximum performance and efficiency. This innovative design combined with configurability enables flexible LDPC decoders with high throughput, low latency, and high hardware efficiency without introducing error floors for high throughput communication systems.
- Proven in IEEE standards, selected for data channel in 5G NR
- Complete 3GPP compliant chain
- 16x latency improvement (to support numerology 4)
- Supports full code block and transport block processing
- Open standard software API’s (DPDK) and reference kits
- Delivered in multiple form factors for ASIC, FPGA and Software only
Polar
This relatively new code base, selected by the 3GPP for 5G NR, is incredibly complex. We have created a unique Polar architecture which enables higher degrees of parallel processing than before. It is easy to integrate, significantly reducing resource and memory usage while delivering excellent BLER performance.
- Selected for 5G NR control channel
- Patented IP, complete 3GPP compliant chain
- High degrees of parallel processing and scalability
- Superior hardware efficiency and latency reduction
- Delivered in multiple form factors for ASIC, FPGA and Software only
- Configurable decoder list size to best fit the BLER/PPA requirements
Turbo
The AccelerCommTM Turbo decoder is a unique patented implementation to enable a highly parallel architecture that’s required to meet the performance and low latency demands of next-generation wireless communication systems.
- Proven in 4G, will be used in 3GPP LTE pro & NB-IoT
- Compliant with 3GPP rel 8 – 15
- 10X improvements tin information throughput speeds and latency reduction
- Delivered in multiple form factors for ASIC and FPGA