LDPC IP for 3GPP 5G NR | AccelerComm Channel Coding Experts

3GPP compliant encoding & decoding chain

Video 8 - Furure Proofing base stations for 5G v2

Rob Maunder, CTO - LDPC channel code for 5G new radio

Our LDPC encoding and decoding IP for the 3GPP New Radio uplink and downlink data channel includes the entire processing chain, to provide quick and easy integration and minimize the amount of extra work needed. The LDPC core uses novel layer belief propagation schedules with early termination, in order to achieve compromise-free error correction performance with high hardware efficiency.

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Features

Fully compliant with the 3GPP NR standard for PDSCH, PUSCH. Supports the full range of uncoded and encoded block sizes
Implements the entire LDPC encoding and decoding chain in 3GPP TS38.212
High error correction performance from LDPC decoder core
Tightly integrates the components in the chain to reduce area usage and latency
Simple interface, quick to integrate – all parameters are internally calculated

FPGA support for Xilinx, Intel and Achronix
Optimized for ASIC process
Optimized software solution on Intel Architecture and AVX512 acceleration
Matlab and C Models available
Configurable parameters for power & performance optimization
Scalable design
Standard AXI interfaces

Functional specifics

Encoder	Decoder
CRC encoding	CRC decoding
LDPC encoding (basegraph 1 and 2, all Z-values)	LDPC encoding (basegraph 1 and 2, all Z-values)
Rate matching (incl. repetition)	HARQ combining
Bit-level interleaver	Filler bits insertion/removal
Filler bits insertion/removal	Inverse Rate matching (incl. repetition)
	Bit-level de-interleaver
	Soft-output interface (optional)
	Re-encoded output stream (optional)

SD-FEC decoder

AccelerComm has also partnered with Xilinx to deliver all the code block chain components required to support 3GPP TS38.212 around the hardened SD-FEC LDPC decoder available with Zynq® UltraScale+™ RFSoC devices from Xilinx. It implements the entire LDPC encoding and decoding chain with superior performance and hardware efficiency.

Technical resources

Our technical resources are freely available for anyone to download. Research and innovation form an integral part of our business and we want to share this with you.

Datasheets

Detailed specification sheets for our LDPC product, including block diagrams, performance graphs and comparison tables.

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Whitepapers

Research, technical leadership and tutorial papers from our CTO on the latest factors influencing the future of LDPC standards.

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Software

Open source software models and evaluation code for encoder and decoder simulations for our LDPC product.

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Delivering 5G communications

Download our presentation to find out how we're revolutionising cellular communications.

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5G NR LDPC Product Overview

Key features and benefits of our LDPC product suite for 5G New Radio Applications.

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Latest news & media

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In partnership with Xilinx

High Performance Channel Coding Solutions on Xilinx Zynq UltraScale+ RFSoC Devices from Xilinx, Inc.

In partnership with Xilinx

ZCU111 Reference Platform Demo

In partnership with Intel

New Highly Optimized LDPC Decoder in Software for Intel’s FlexRAN Reference Software Will Increase Throughput by up to 3X

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We are transforming the next generations of wireless communications with innovative, world-leading IP that delivers ultra-high performance and error resilient signal processing. Let’s connect to discuss how our channel coding solutions can help your business thrive today and into the future.

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